Roberto Giorgi's Papers

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INTELLECTUAL PROPERTY: Software Copyrights

IP2) [Bartolini06e]
S. Bartolini, P. Bennati, R. Giorgi, "BlueSign 2", SIAE 24-02-2006/001, Reg. 24 Feb. 2006.
BibTeX entry: Bartolini06e.bib.

IP1) [Bennati03a]
P. Bennati, T. Capasso, V. Di Massa, F. Giallombardo, R. Giorgi, M. Guerrini, E. Maggio, N. Nannetti, "BlueSign Translator", SIAE 002568, Ord. D003454, Reg. 21 Mar. 2003.
Abstract, PDF.
BibTeX entry: Bennati03a.bib.

PAPERS: International and National Journals

J35) [Sahebi23-jbd]
A. Sahebi, M. Barbone, M. Procaccini, W. Luk, G. Gaydadjiev, R. Giorgi, "Distributed large-scale graph processing on FPGAs", Springer Journal of Big Data, vol. 10, no. 1, Jun 2023.
doi:10.1186/s40537-023-00756-x, ISSN: 2196-1115, SCOPUS: 2-s2.0-85161084227, WOS:001000115000001.
BibTeX entry: Sahebi23-jbd.bib.

J34) [Mariotti22-softwarex]
G. Mariotti, R. Giorgi, "WebRISC-V: A 32/64-bit RISC-V pipeline simulation tool", ELSEVIER SoftwareX, vol. 18, May 2022, pp. 1-7.
Abstract, PDF, doi:10.1016/j.softx.2022.101105, ISSN: 2352-7110, SCOPUS: 2-s2.0-85130837344, WOS:000806618800002.
BibTeX entry: Mariotti22-softwarex.bib.

J33) [Filgueras21-ieee_dnt]
A. Filgueras, M. Vidal, M. Mateu, D. Jiménez-González, C. Álvarez, X. Martorell, E. Ayguadé, D. Theodoropoulos, D. Pnevmatikatos, P. Gai, S. Garzarella, D. Oro, J. Hernando, N. Bettin, A. Pomella, M. Procaccini, R. Giorgi, "The AXIOM Project: IoT on Heterogeneous Embedded Platforms", IEEE Design and Test, vol. 38, no. 5, Nov. 2021, pp. 74-81.
Abstract, PDF, doi:10.1109/MDAT.2019.2952335, ISSN: 2168-2356, SCOPUS: 2-s2.0-85074820785, WOS:000701241400016.
BibTeX entry: Filgueras21-ieee_dnt.bib.

J32) [Giorgi19-ijrc]
R. Giorgi, F. Khalili, M. Procaccini, "Translating Timing into an Architecture: the Synergy of COTSon and HLS (Domain Expertise: Designing a Computer Architecture via HLS)", Int.l Journal of Reconfigurable Computing, London, UK, 2 Sept.2 2019, pp. 1-18.
Abstract, PDF, doi:10.1155/2019/2624938, ISSN: 1687-7209, SCOPUS: 2-s2.0-85075350510, WOS:000498565600001.
BibTeX entry: Giorgi19-ijrc.bib.

J31) [Giorgi18-micpro]
R. Giorgi, "Scalable Embedded Computing through Reconfigurable Hardware: comparing DF-Threads, Cilk, OpenMPI and Jump", ELSEVIER Microprocessors and Microsystems, vol. 63, Aug. 2018, pp. 66-74.
Abstract, doi:10.1016/j.micpro.2018.08.005, ISSN: 0141-9331, SCOPUS: 2-s2.0-85053430111, WOS:000454382500007.
BibTeX entry: Giorgi18-micpro.bib.

J30) [Theodoropoulos17-micpro]
D. Theodoropoulos, S. Mazumdar, E. Ayguade, N. Bettin, J. Bueno, S. Ermini, A. Filgueras, D. Jimenez-Gonzalez, C. Alvarez Martinez, X. Martorell, F. Montefoschi, D. Oro, D. Pnevmatikatos, A. Rizzo, P. Gai, S. Garzarella, B. Morelli, A. Pomella, R. Giorgi, "The AXIOM platform for next-generation cyber physical systems", ELSEVIER Microprocessors and Microsystems, 2017, pp. 540-555.
doi:10.1016/j.micpro.2017.05.018, ISSN: 0141-9331, SCOPUS: 2-s2.0-85021936895, WOS:000407984000049.
BibTeX entry: Theodoropoulos17-micpro.bib.

J29) [Weis16-ijpp]
S. Weis, A. Garbade, B. Fechner, A. Mendelson, R. Giorgi, T. Ungerer, "Architectural Support for Fault Tolerance in a Teradevice Dataflow System", Springer Int.l Journal of Parallel Programming, New York, NY, USA, vol. 44, no. 2, Apr 2016, pp. 208-232.
Abstract, doi:10.1007/s10766-014-0312-y, ISSN: 1573-7640, SCOPUS: 2-s2.0-84901582160, WOS:000373569600002.
BibTeX entry: Weis16-ijpp.bib.

J28) [Giorgi16-auj]
R. Giorgi, S. Mazumdar, S. Viola, P. Gai, S. Garzarella, B. Morelli, D. Pnevmatikatos, D. Theodoropoulos, C. Alvarez, E. Ayguade, J. Bueno, A. Filgueras, D. Jimenez-Gonzalez, X. Martorell, "Modeling Multi-Board Communication in the AXIOM Cyber-Physical System", Ada User Journal, vol. 37, no. 4, December 2016, pp. 228-235.
Abstract, ISSN: 1381-6551, SCOPUS: 2-s2.0-85004143304.
BibTeX entry: Giorgi16-auj.bib.

J27) [Burgio16a]
P. Burgio, C. Alvarez, E. Ayguade, A. Filgueras, D. Jimenez-Gonzalez, X. Martorell, N. Navarro, R. Giorgi, "Simulating next-generation cyber-physical computing platforms", Ada User Journal, vol. 37, no. 1, Mar. 2016, pp. 59-63.
PDF, ISSN: 1381-6551, SCOPUS: 2-s2.0-84974555745.
BibTeX entry: Burgio16a.bib.

J26) [Verdoscia16-mpe]
L. Verdoscia, R. Giorgi, "A Data-Flow Soft-Core Processor for Accelerating Scientific Calculation on FPGAs", Mathematical Problems in Engineering, vol. 2016, no. 1, Apr. 2016, pp. 1-21, (article ID 3190234).
Abstract, doi:10.1155/2016/3190234, ISSN: 1563-5147, SCOPUS: 2-s2.0-84973355670, WOS:000376890200001.
BibTeX entry: Verdoscia16-mpe.bib.

J25) [Rizzo16-ixdea]
A. Rizzo, G. Burresi, F. Montefoschi, M. Caporali, R. Giorgi, "Making IoT with UDOO", Interaction Design and Architecture(s), vol. 1, no. 30, Dec. 2016, pp. 95-112.
Abstract, PDF, ISSN: 1826-9745, SCOPUS: 2-s2.0-85007362581, WOS:000393571700007.
BibTeX entry: Rizzo16-ixdea.bib.

J24) [Alvarez16a]
C. Alvarez, E. Ayguade, J. Bosch, J. Bueno, A. Cherkashin, A. Filgueras, D. Jiminez-Gonzalez, X. Martorell, N. Navarro, M. Vidal, D. Theodoropoulos, D. Pnevmatikatos, D. Catani, D. Oro, C. Fernandez, C. Segura, J. Rodriguez, J. Hernando, C. Scordino, P. Gai, P. Passera, A. Pomella, N. Bettin, A. Rizzo, R. Giorgi, "The AXIOM Software Layers", ELSEVIER Microprocessors and Microsystems, vol. 47, Part B, 2016, pp. 262-277.
Abstract, doi:10.1016/j.micpro.2016.07.002, ISSN: 0141-9331, SCOPUS: 2-s2.0-84979544372, WOS:000390513300003.
BibTeX entry: Alvarez16a.bib.

J23) [Wesner15a]
S. Wesner, L. Schubert, R. Badia, A. Rubio, P. Paolucci, R. Giorgi, "Special Section on Terascale Computing", ELSEVIER Future Generation Computer Systems, New York, NY, USA, vol. 53, July 2015, pp. 88-89.
Abstract, doi:10.1016/j.future.2015.07.015, SCOPUS: 2-s2.0-84939190506, WOS:000361075400008.
BibTeX entry: Wesner15a.bib.

J22) [Giorgi15c]
R. Giorgi, "Transactional Memory on a Dataflow Architecture for Accelerating Haskell", WSEAS Trans. Computers, vol. 14, 2015, pp. 546-558.
Abstract, PDF, ISSN: 1109-2750.
BibTeX entry: Giorgi15c.bib.

J21) [Burgio15a]
P. Burgio, C. Alvarez, E. Ayguadé, A. Filgueras, D. Jiménez-González, X. Martorell, N. Navarro, R. Giorgi, "Simulating next-generation Cyber-physical computing platforms", Ada User Journal, vol. 36, no. 4, Dec. 2015, pp. 259-263.
Abstract, PDF, ISSN: 1381-6551, SCOPUS: 2-s2.0-84960085502.
BibTeX entry: Burgio15a.bib.

J20) [Giorgi15-fgcs]
R. Giorgi, A. Scionti, "A scalable thread scheduling co-processor based on data-flow principles", ELSEVIER Future Generation Computer Systems, Amsterdam, Netherlands, vol. 53, Dec. 2015, pp. 100-108.
Abstract, doi:10.1016/j.future.2014.12.014, ISSN: 0167-739X, SCOPUS: 2-s2.0-84939202928, WOS:000361075400010.
BibTeX entry: Giorgi15-fgcs.bib.

J19) [Giorgi14a]
R. Giorgi, R. Badia, F. Bodin, A. Cohen, P. Evripidou, P. Faraboschi, B. Fechner, G. Gao, A. Garbade, R. Gayatri, S. Girbal, D. Goodman, B. Khan, S. Koliaï, J. Landwehr, N. Minh, F. Li, M. Lujàn, A. Mendelson, L. Morin, N. Navarro, T. Patejko, A. Pop, P. Trancoso, T. Ungerer, I. Watson, S. Weis, S. Zuckerman, M. Valero, "TERAFLUX: Harnessing dataflow in next generation teradevices", ELSEVIER Microprocessors and Microsystems, Netherlands, Amsterdam, vol. 38, no. 8, Part B, 2014, pp. 976-990.
Abstract, PDF, doi:10.1016/j.micpro.2014.04.001, ISBN: N/A, ISSN: 0141-9331, SCOPUS: 2-s2.0-84912558447, WOS:000347755500013.
BibTeX entry: Giorgi14a.bib.

J18) [Portero11a]
A. Portero, Z. Yu, R. Giorgi, "TERAFLUX: Exploiting Tera-device Computing Challenges", ELSEVIER Procedia Computer Science, New York, NY, USA, vol. 7, 2011, pp. 146-147, (Proc. 2nd European Future Technologies Conf. and Exhibition 2011 (FET 11)).
Abstract, PDF, doi:10.1016/j.procs.2011.09.081, ISBN: N/A, ISSN: 1877-0509, SCOPUS: 2-s2.0-84856501660, WOS:000299100900045.
BibTeX entry: Portero11a.bib.

J17) [Bartolini08-ieee_tc]
S. Bartolini, I. Branovic, R. Giorgi, E. Martinelli, "Effects of Instruction-set Extensions on an Embedded Processor: a Case Study on Elliptic Curve Cryptography over GF(2/sup m/)", IEEE Trans. Computers, Los Alamitos, CA, USA, vol. 57, no. 5, May 2008, pp. 672-685.
Abstract, doi:10.1109/TC.2007.70832, ISBN: N/A, ISSN: 0018-9340, SCOPUS: 2-s2.0-64349109200, WOS:000254054500008.
BibTeX entry: Bartolini08-ieee_tc.bib.

J16) [Bartolini07-md]
S. Bartolini, P. Bennati, R. Giorgi, "L'Informatica per i sordi: su palmare la lingua dei segni", Mondo Digitale, June 2007, pp. 42-49.
Abstract, ISSN: 1720898X, SCOPUS: 2-s2.0-34547978230.
BibTeX entry: Bartolini07-md.bib.

J15) [Bartolini06d]
S. Bartolini, P. Foglia, R. Giorgi, C. Prete, "MEmory performance: DEaling with Applications, systems and architecture", ACM SIGARCH Computer Architecture News, New York, NY, USA, vol. 34, no. 1, Mar. 2006, pp. 1-2.
Abstract, PDF, doi:10.1145/1152779.1147352, ISSN: 0163-5964, SCOPUS: 2-s2.0-36749070946.
BibTeX entry: Bartolini06d.bib.

J14) [Bartolini06b]
S. Bartolini, R. Giorgi, "Issues in Embedded Single-Chip Multicore Architectures", Journal of Embedded Computing, Amsterdam, Netherlands, vol. 2, no. 2, Dec. 2006, pp. 137-139.
Abstract, PDF, ISSN: 1740-4460.
BibTeX entry: Bartolini06b.bib.

J13) [Foglia05-jpdc]
P. Foglia, R. Giorgi, C. Prete, "Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload", ELSEVIER Journal of Parallel and Distributed Computing, Amsterdam, Netherlands, vol. 65, no. 3, Mar. 2005, pp. 289-306.
Abstract, doi:10.1016/j.jpdc.2004.10.003, ISBN: N/A, ISSN: 0743-7315, SCOPUS: 2-s2.0-14544307829, WOS:000227568200004.
BibTeX entry: Foglia05-jpdc.bib.

J12) [Bartolini05d]
S. Bartolini, P. Foglia, R. Giorgi, C. Prete, "Memory Performance: Dealing with Applications, Systems and Architecture", SIGARCH Comput. Archit. News, New York, NY, vol. 34, no. 1, Sept. 2005, pp. 2.
doi:10.1145/1147349.1147352, ISSN: 0163-5964, SCOPUS: 2-s2.0-85027395178.
BibTeX entry: Bartolini05d.bib.

J11) [Foglia04b]
P. Foglia, R. Giorgi, C. Prete, "Speeding-up multiprocessors running DBMS workloads through coherence protocol", Int. J. High Performance Computing and Networking,, Olney, Bucks. (UK), vol. 1, no. 1/2, June 2004, pp. 17-32.
Abstract, PDF, doi:10.1504/IJHPCN.2004.007562, ISSN: 1740-0562, SCOPUS: 2-s2.0-58149302977.
BibTeX entry: Foglia04b.bib.

J10) [Foglia04a]
P. Foglia, R. Giorgi, C. Prete, "Simulation Study of Memory Performance of SMP Multiprocessors Running a TPC-W Workload", IEE Proceedings Computers and Digital Techniques, London, UK, vol. 151, no. 2, Mar. 2004, pp. 93-109.
Abstract, PDF, doi:10.1049/ip-cdt:20040349, ISBN: N/A, ISSN: 1350-2387, SCOPUS: 2-s2.0-1642295014, WOS:000220430400001.
BibTeX entry: Foglia04a.bib.

J9) [Branovic04b]
I. Branovic, R. Giorgi, E. Martinelli, "A Workload Characterization of Elliptic Curve Cryptography Methods in Embedded Environments", ACM SIGARCH Computer Architecture News, New York, NY, USA, vol. 32, no. 3, June 2004, pp. 27-34.
Abstract, PDF, doi:10.1145/1024295.1024299, ISSN: 0163-5964, SCOPUS: 2-s2.0-77953567600.
BibTeX entry: Branovic04b.bib.

J8) [Kavi01-ieee_tc]
K. Kavi, R. Giorgi, J. Arul, "Scheduled Dataflow: Execution Paradigm, Architecture, and Performance Evaluation", IEEE Trans. Computers, Los Alamitos, CA, USA, vol. 50, no. 8, Aug. 2001, pp. 834-846.
Abstract, doi:10.1109/12.947003, ISBN: N/A, ISSN: 0018-9340, SCOPUS: 2-s2.0-0035416089, WOS:000170643500007.
BibTeX entry: Kavi01-ieee_tc.bib.

J7) [Giorgi01a]
R. Giorgi, "Memory Decoupled Architectures and related issues Guest Editor's Introduction", IEEE TCCA Newsletter, Los Alamitos, CA, USA, Jan. 2001, pp. 2-4.
Abstract, PDF, ISSN: 1041-1186 .
BibTeX entry: Giorgi01a.bib.

J6) [Bartolini01a]
S. Bartolini, R. Giorgi, J. Protic, C. Prete, M. Valero, "Parallel Architecture and Compilation Techniques: Selection of workshop papers, Guests' Editors Introduction", ACM SIGARCH Computer Architecture News, New York, NY, USA, vol. 29, no. 5, Dec. 2001, pp. 9-12.
Abstract, PDF, doi:10.1145/563647.563651, ISSN: 0163-5964.
BibTeX entry: Bartolini01a.bib.

J5) [Kavi00-jucs]
K. Kavi, J. Arul, R. Giorgi, "Execution and Cache Performance of the Scheduled Dataflow Architecture", SPRINGER Journal of Universal Computer Science, New York, NY, (USA), vol. 6, no. 10, Oct. 2000, pp. 948-967, Special Issue on Multithreaded Processors and Chip Multiprocessors.
Abstract, doi:10.3217/jucs-006-10-0948, ISSN: 0948-6968, SCOPUS: 2-s2.0-0000254845.
BibTeX entry: Kavi00-jucs.bib.

J4) [Giorgi99-ieee_tpds]
R. Giorgi, C. Prete, "PSCR: A Coherence Protocol for Eliminating Passive Sharing in Shared-Bus Shared-Memory Multiprocessors", IEEE Trans. Parallel and Distributed Systems, Vol. 10, No. 7, Los Alamitos, CA, USA, July 1999, pp. 742-763.
Abstract, doi:10.1109/71.780868, ISBN: N/A, ISSN: 1045-9219, SCOPUS: 2-s2.0-0033363130, WOS:000081713100006.
BibTeX entry: Giorgi99-ieee_tpds.bib.

J3) [Giorgi99c]
R. Giorgi, C. Prete, "An Educational Environment for Designing and Performance Tuning of Embedded Systems", IEEE TCCA Newsletter, Los Alamitos, CA, USA, Feb. 1999, pp. 54-56.
Abstract, PDF, ISSN: 1041-1186 .
BibTeX entry: Giorgi99c.bib.

J2) [Prete97a]
C. Prete, G. Prina, R. Giorgi, L. Ricciardi, "Some Considerations About Passive Sharing in Shared-Memory Multiprocessors", IEEE TCCA Newsletter, Los Alamitos, CA, USA, Mar. 1997, pp. 34-40.
Abstract, PDF, ISSN: 1041-1186.
BibTeX entry: Prete97a.bib.

J1) [Giorgi97-ieee_concurrency]
R. Giorgi, C. Prete, G. Prina, L. Ricciardi, "Trace Factory: Generating Workloads for Trace-Driven Simulation of Shared-Bus Multiprocessors", IEEE Concurrency, Los Alamitos, CA, USA, vol. 5, no. 4, Oct. 1997, pp. 54-68.
Abstract, PDF, doi:10.1109/4434.641627, ISBN: 0-8186-7743-0, ISSN: 1092-3063, SCOPUS: 2-s2.0-0031246107, WOS:A1997YH98400010.
BibTeX entry: Giorgi97-ieee_concurrency.bib.

MONOGRAPHY/BOOKS/PROCEEDINGS

G6) [Milutinovic15-springer]
V. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "Guide to DataFlow Supercomputing", Springer, Berlin, DE, Apr 2015, pp. 1-127.
Abstract, doi:10.1007/978-3-319-16229-4, ISBN: 978-3-319-16228-7, ISSN: 1617-7975, WOS:000374480500008.
BibTeX entry: Milutinovic15-springer.bib.

G5) [Giorgi10a]
R. Giorgi, S. Wong, "WRC'10: Proc. 2010 Workshop on Reconfigurable Computing", TU-Delft / EWI Computer Engineering Laboratory, Delft, The Netherlands, Jan. 2010, pp. 1-116.
PDF, ISBN: 978-90-72298-05-8.
BibTeX entry: Giorgi10a.bib.

G4) [Bartolini09a]
S. Bartolini, P. Foglia, R. Giorgi, C. Prete, "MEDEA '09: Proc. 2009 workshop on MEmory performance", ACM, New York, NY, USA, Sept. 2009, pp. 1-48.
Abstract, doi:10.1145/1621960, ISBN: 978-1-60558-830-8, SCOPUS: 2-s2.0-74749100609.
BibTeX entry: Bartolini09a.bib.

G3) [Bartolini08b]
S. Bartolini, P. Foglia, R. Giorgi, C. Prete, "MEDEA '08: Proc. 2008 workshop on MEmory performance", ACM, New York, NY, USA, Oct. 2008, pp. 1-84.
doi:10.1145/1509084, ISBN: 978-1-60558-243-6, SCOPUS: 2-s2.0-77954464017.
BibTeX entry: Bartolini08b.bib.

G2) [Bartolini07b]
S. Bartolini, P. Foglia, R. Giorgi, C. Prete, "MEDEA '07: Proc. 2007 workshop on MEmory performance", ACM, New York, NY, USA, 2007, pp. 1-113.
doi:10.1145/1327171, ISBN: 978-1-59593-807-7, SCOPUS: 2-s2.0-77954506101.
BibTeX entry: Bartolini07b.bib.

G1) [Bartolini06f]
S. Bartolini, P. Foglia, R. Giorgi, C. Prete, "Proc. 2006 workshop on MEmory performance: DEaling with Applications, systems and architectures", ACM Press, New York, NY, U.S.A., 2006, pp. 1-52.
doi:10.1145/1166133, ISBN: 1-59593-568-1.
BibTeX entry: Bartolini06f.bib.

BOOK'S CHAPTERS

B11) [Giorgi17b]
R. Giorgi, "Exploring Future Many-Core Architectures: The TERAFLUX Evaluation Framework", Elsevier, 2017, pp. 33-72.
Abstract, doi:10.1016/bs.adcom.2016.09.002, ISSN: 0065-2458, SCOPUS: 2-s2.0-85008936555, WOS:000403245600003.
BibTeX entry: Giorgi17b.bib.

B10) [Giorgi17a]
R. Giorgi, N. Bettin, P. Gai, X. Martorell, A. Rizzo, "AXIOM: A Flexible Platform for the Smart Home", Springer Int.l Pub., Cham, 2016, pp. 57-74.
Abstract, doi:10.1007/978-3-319-42304-3_3, ISBN: 978-3-319-42304-3, SCOPUS: 2-s2.0-85006445773.
BibTeX entry: Giorgi17a.bib.

B9) [Milutinovic15e]
V. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "Using the WebIDE", Springer Int.l Publishing, 2015, pp. 107-122.
doi:10.1007/978-3-319-16229-4_4, ISBN: 9783319162294, ISSN: 1617-7975, WOS:000374480500005.
BibTeX entry: Milutinovic15e.bib.

B8) [Milutinovic15d]
V. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "An Example Application: Fourier Transform", Springer Int.l Publishing, 2015, pp. 73-106.
doi:10.1007/978-3-319-16229-4_3, ISBN: 9783319162294, ISSN: 1617-7975, WOS:000374480500004.
BibTeX entry: Milutinovic15d.bib.

B7) [Milutinovic15c]
V. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "Selected Case Studies", Springer Int.l Publishing, 2015, pp. 41-72.
doi:10.1007/978-3-319-16229-4_2, ISBN: 9783319162294, ISSN: 1617-7975, WOS:000374480500003.
BibTeX entry: Milutinovic15c.bib.

B6) [Milutinovic15b]
V. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "The DataFlow Paradigm", Springer Int.l Publishing, 2015, pp. 1-39.
doi:10.1007/978-3-319-16229-4_1, ISBN: 9783319162294, ISSN: 1617-7975, WOS:000374480500002.
BibTeX entry: Milutinovic15b.bib.

B5) [Milutinovic15h]
V. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "Guide to DataFlow Supercomputing Basic Concepts, Case Studies, and a Detailed Example Postscript", Springer, Berlin, DE, Apr 2015, pp. 125-125.
Abstract, doi:10.1007/978-3-319-16229-4, ISBN: 978-3-319-16228-7, ISSN: 1617-7975, WOS:000374480500007.
BibTeX entry: Milutinovic15h.bib.

B4) [Milutinovic15g]
V. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "Guide to DataFlow Supercomputing Basic Concepts, Case Studies, and a Detailed Example Epilogue", Springer, Berlin, DE, Apr 2015, pp. 123-123.
Abstract, doi:10.1007/978-3-319-16229-4, ISBN: 978-3-319-16228-7, ISSN: 1617-7975, WOS:000374480500006.
BibTeX entry: Milutinovic15g.bib.

B3) [Milutinovic15f]
V. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "Guide to DataFlow Supercomputing Basic Concepts, Case Studies, and a Detailed Example Preface", Springer, Berlin, DE, Apr 2015, pp. V-V.
Abstract, doi:10.1007/978-3-319-16229-4, ISBN: 978-3-319-16228-7, ISSN: 1617-7975, WOS:000374480500001.
BibTeX entry: Milutinovic15f.bib.

B2) [Wong11b]
S. Wong, L. Carro, M. Rutzig, D. Matos, R. Giorgi, N. Puzovic, S. Kaxiras, M. Cintra, G. Desoli, P. Gai, S. Mckee, A. Zaks, "ERA–Embedded Reconfigurable Architectures", Springer New York, Aug 2011, pp. 239-259.
Abstract, PDF, doi:10.1007/978-1-4614-0061-5i_10, ISBN: 978-1-4614-0061-5, ISSN: N/A, WOS:000294271300010.
BibTeX entry: Wong11b.bib.

B1) [Bartolini09b]
S. Bartolini, R. Giorgi, E. Martinelli, "Instruction Set Extensions for Cryptographic Applications", Springer, 2009, pp. 191-233.
Abstract, doi:10.1007/978-0-387-71817-0_9, ISBN: 978-0-387-71816-3.
BibTeX entry: Bartolini09b.bib.

PAPERS: International and National Conference Proceedings

C78) [Procaccini24-parmaditam]
M. Procaccini, A. Sahebi, M. Barbone, W. Luk, G. Gaydadjiev, R. Giorgi, "Accelerating Large-Scale Graph Processing with FPGAs Lesson Learned and Future Directions", 15th Workshop on Parallel Programming and Run-Time, Dagstuhl, Germany, vol. 116, 2024, pp. 61-612.
PDF, doi:10.4230OASIcs.PARMA-DITAM.2024.6, ISBN: 978-3-95977-307-2, ISSN: 2190-6807.
BibTeX entry: Procaccini24-parmaditam.bib.

C77) [Giorgi22-meco]
R. Giorgi, "Extending Performance and Reliability via Modular FPGA Clusters", IEEE 11th Mediterranean Conf. on Embedded Computing (MECO), June 2022, pp. 1-1.
Abstract, PDF, doi:10.1109/MECO55406.2022.9797208, ISBN: 978-1-6654-6829-9, ISSN: 2377-5475, SCOPUS: ,, INSPEC: 21799653.
BibTeX entry: Giorgi22-meco.bib.

C76) [Giorgi21-arcs]
R. Giorgi, M. Procaccini, A. Sahebi, "DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model", Proc. 34th Int.l Conf., ARCS 2021, Berlin, Germany, June 2021, pp. 15.
Abstract, PDF, doi:10.1007/978-3-030-81682-7_6, ISBN: 9783030816810, SCOPUS: 2-s2.0-85112718870, WOS:000691436300006.
BibTeX entry: Giorgi21-arcs.bib.

C75) [Aldinucci21-cf]
M. Aldinucci, G. Agosta, A. Andreini, C. Ardagna, A. Bartolini, A. Cilardo, B. Cosenza, M. Danelutto, R. Esposito, W. Fornaciari, R. Giorgi, D. Lengani, R. Montella, M. Olivieri, S. Saponara, D. Simoni, M. Torquati, "The Italian Research on HPC Key Technologies across EuroHPC", Proc. 18th ACM Int.l Conf. on Computing Frontiers, New York, NY, USA, April 2021, pp. 7.
Abstract, PDF, doi:10.1145/3457388.3458508, ISBN: 9781450384049, SCOPUS: 2-s2.0-85105980898, WOS:000934880500027.
BibTeX entry: Aldinucci21-cf.bib.

C74) [Verdoscia19a]
L. Verdoscia, A. Sahebi, R. Giorgi, "A Data-Flow Methodology for Accelerating FFT", IEEE 8th Mediterranean Conf. on Embedded Computing (MECO), June 2019, pp. 471-474, Best Paper Award.
Abstract, doi:10.1109/MECO.2019.8760044, ISBN: 978-1-7281-1740-9, ISSN: 2377-5475, SCOPUS: 2-s2.0-85073899138, WOS:000492146100114.
BibTeX entry: Verdoscia19a.bib.

C73) [Giorgi19-mecoiris]
R. Giorgi, N. Bettin, S. Ermini, F. Montefoschi, A. Rizzo, "An Iris+Voice Recognition System for a Smart Doorbell", IEEE 8th Mediterranean Conf. on Embedded Computing (MECO), June 2019, pp. 419-422.
Abstract, doi:10.1109/MECO.2019.8760187, ISBN: 978-1-7281-1740-9, ISSN: 2377-5475, SCOPUS: 2-s2.0-85073892739, WOS:000492146100102.
BibTeX entry: Giorgi19-mecoiris.bib.

C72) [Giorgi19-mecoherta]
R. Giorgi, D. Oro, S. Ermini, F. Montefoschi, A. Rizzo, "Embedded Face Analysis for Smart Videosurveillance", IEEE 8th Mediterranean Conf. on Embedded Computing (MECO), June 2019, pp. 403-407.
Abstract, doi:10.1109/MECO.2019.8760200, ISBN: 978-1-7281-1740-9, ISSN: 2377-5475, SCOPUS: 2-s2.0-85073885705, WOS:000492146100098.
BibTeX entry: Giorgi19-mecoherta.bib.

C71) [Giorgi19-wcae]
R. Giorgi, G. Mariotti, "WebRISC-V: a Web-Based Education-Oriented RISC-V Pipeline Simulation Environment", ACM Workshop on Computer Architecture Education (WCAE-19), Phoenix, AX, (USA), June 2019, pp. 1-6.
Abstract, PDF, doi:10.1145/3338698.3338894, ISBN: 978-1-4503-6842-1, SCOPUS: 2-s2.0-8507127341, WOS:000694698400003.
BibTeX entry: Giorgi19-wcae.bib.

C70) [Giorgi19-rapido]
R. Giorgi, F. Khalili, M. Procaccini, "A Design Space Exploration Tool Set for Future 1K-core High-Performance Computers", ACM Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), Valencia, Spain, Jan. 2019, pp. 1-6.
Abstract, PDF, doi:10.1145/3300189.3300195, ISBN: 978-1-4503-6260-3, SCOPUS: 2-s2.0-85066922404, WOS:000482022000006.
BibTeX entry: Giorgi19-rapido.bib.

C69) [Giorgi19-pdp]
R. Giorgi, F. Khalili, M. Procaccini, "Analyzing the Impact of Operating System Activity of different Linux Distributions in a Distributed Environment", IEEE Euromicro Int.l Conf. on Parallel, Distributed, and Network-Based Processing, Pavia, Italy, Feb. 2019, pp. 422-429.
Abstract, PDF, doi:10.1109/EMPDP.2019.8671562, ISBN: 978-1-7281-1644-0, SCOPUS: 2-s2.0-85063904172.
BibTeX entry: Giorgi19-pdp.bib.

C68) [Giorgi19-hpcs]
R. Giorgi, M. Procaccini, "Bridging a Data-Flow Execution Model to a Simple Programming Model", IEEE Proc. of the Int.l Conf. on High Performance Computing and Simulation (HPCS), Dublin, Ireland, July 2019, pp. 165-168.
Abstract, PDF, doi:10.1109/HPCS48598.2019.9188183, ISBN: 978-1-7281-4484-9, SCOPUS: 2-s2.0-85092043656.
BibTeX entry: Giorgi19-hpcs.bib.

C67) [Giorgi19-date]
R. Giorgi, F. Khalili, M. Procaccini, "AXIOM: A Scalable, Efficient and Reconfigurable Embedded Platform", IEEE Proc. Design, Automation and Test in Europe (DATE), Florence, Italy, Mar. 2019, pp. 1-6.
Abstract, PDF, doi:10.23919/DATE.2019.8715168, ISBN: 978-3-9819263-3-0, SCOPUS: 2-s2.0-85063874249, WOS:000470666100088.
BibTeX entry: Giorgi19-date.bib.

C66) [Giorgi18-icm]
R. Giorgi, F. Khalili, M. Procaccini, "Energy Efficiency Exploration on the ZYNQ Ultrascale+", IEEE Proc. 30th Int.l Conf. on Microelectronics (ICM), Sousse, Tunisia, Dec. 2018, pp. 52-55.
Abstract, PDF, ISBN: 978-1-5386-8166-4, SCOPUS: 2-s2.0-85065744778, WOS:000469316700014.
BibTeX entry: Giorgi18-icm.bib.

C65) [Giorgi17c]
R. Giorgi, "AXIOM: A 64-bit reconfigurable hardware/software platform for scalable embedded computing", IEEE 6th Mediterranean Conf. on Embedded Computing (MECO), June 2017, pp. 113-116.
Abstract, doi:10.1109/MECO.2017.7977173, ISBN: 978-1-5090-6741-1, SCOPUS: 2-s2.0-85027066268, WOS:000428759500032.
BibTeX entry: Giorgi17c.bib.

C64) [Rizzo17a]
A. Rizzo, F. Montefoschi, M. Caporali, A. Gisondi, G. Burresi, R. Giorgi, "Rapid Prototyping IoT Solutions Based on Machine Learning", Proc. European Conf. on Cognitive Ergonomics 2017, New York, NY, USA, 2017, pp. 4.
Abstract, doi:10.1145/3121283.3121291, ISBN: 978-1-4503-5256-7, SCOPUS: 2-s2.0-85033447501.
BibTeX entry: Rizzo17a.bib.

C63) [Mazumdar16a]
S. Mazumdar, E. Ayguade, N. Bettin, S. Bueno J. and Ermini, A. Filgueras, D. Jimenez-Gonzalez, C. Martinez, X. Martorell, F. Montefoschi, D. Oro, D. Pnevmatikatos, A. Rizzo, D. Theodoropoulos, R. Giorgi, "AXIOM: A Hardware-Software Platform for Cyber Physical Systems", 2016 Euromicro Conf. on Digital System Design (DSD), Aug 2016, pp. 539-546.
Abstract, doi:10.1109/DSD.2016.80, ISBN: 978-1-5090-2816-0, ISSN: N/A, SCOPUS: 2-s2.0-84998953548, WOS:000386638800070, INSPEC: 16413648.
BibTeX entry: Mazumdar16a.bib.

C62) [Giorgi16c]
R. Giorgi, "Exploring Dataflow-based Thread Level Parallelism in Cyber-physical Systems", Proc. ACM Int.l Conf. on Computing Frontiers, New York, NY, USA, 2016, pp. 6.
Abstract, doi:10.1145/2903150.2906829, ISBN: 978-1-4503-4128-8, SCOPUS: 2-s2.0-84978496726.
BibTeX entry: Giorgi16c.bib.

C61) [Alvarez15a]
C. Alvarez, E. Ayguade, J. Bueno, A. Filgueras, D. Jimenez-Gonzalez, X. Martorell, N. Navarro, D. Theodoropoulos, D. Pnevmatikatos, C. Scordino, P. Gai, C. Segura, C. Fernandez, D. Oro, J. Saeta, P. Passera, A. Pomella, A. Rizzo, R. Giorgi, "The AXIOM Software Layers", IEEE Proc. 18th EUROMICRO-DSD, Aug. 2015, pp. 117-124.
Abstract, doi:10.1109/DSD.2015.52, ISBN: 978-1-4673-8035-5, SCOPUS: 2-s2.0-84958165723, WOS:000382382300016.
BibTeX entry: Alvarez15a.bib.

C60) [Burresi15a]
G. Burresi, R. Giorgi, "A Field Experience for a Vehicle Recognition System using Magnetic Sensors", IEEE MECO 2015, Budva, Montenegro, June 2015, pp. 178-181, Best student-paper award.
Abstract, doi:10.1109/MECO.2015.7181897, ISBN: 978-1-4799-8999-7, SCOPUS: 2-s2.0-84961382637, WOS:000380406100041, INSPEC: 7181897.
BibTeX entry: Burresi15a.bib.

C59) [Theodoropoulos15a]
D. Theodoropoulos, D. Pnevmatikatos, C. Alvarez, E. Ayguade, J. Bueno, A. Filgueras, D. Jimenez-Gonzalez, X. Martorell, N. Navarro, C. Segura, C. Fernandez, D. Oro, J. Saeta, P. Gai, C. Scordino, A. Rizzo, R. Giorgi, "The AXIOM project (Agile, eXtensible, fast I/O Module)", IEEE Proc. 15th Int.l Conf. on Embedded Computer Systems: Architecture, MOdeling and Simulation, July 2015, pp. 262-269.
Abstract, doi:10.1109/SAMOS.2015.7363684, SCOPUS: 2-s2.0-84963649776, WOS:000380507900035.
BibTeX entry: Theodoropoulos15a.bib.

C58) [Mondelli15a]
A. Mondelli, N. Ho, A. Scionti, M. Solinas, A. Portero, R. Giorgi, "Dataflow Support in x86-64 Multicore Architectures through Small Hardware Extensions", IEEE Proc. DSD, August 2015, pp. 526-529.
Abstract, PDF, doi:10.1109/DSD.2015.62, SCOPUS: 2-s2.0-84958159285, WOS:000382382300075.
BibTeX entry: Mondelli15a.bib.

C57) [Verdoscia15a]
L. Verdoscia, R. Vaccaro, R. Giorgi, "A matrix multiplier case study for an evaluation of a configurable Dataflow-Machine", ACM CF'15 - LP-EMS, May 2015, pp. 1-6.
Abstract, doi:10.1145/2742854.2747287, ISBN: 978-1-4503-3358-0, SCOPUS: 2-s2.0-84969776968.
BibTeX entry: Verdoscia15a.bib.

C56) [Ho15a]
N. Ho, A. Mondelli, A. Scionti, M. Solinas, A. Portero, R. Giorgi, "Enhancing an x86\_64 Multi-Core Architecture with Data-Flow Execution Support", ACM Computing Frontiers, Ischia, Italy, May 2015, pp. 1-2.
Abstract, doi:10.1145/2742854.2742896, ISBN: 978-1-4503-3358-0, SCOPUS: 2-s2.0-84969802071.
BibTeX entry: Ho15a.bib.

C55) [Giorgi15d]
R. Giorgi, "Scalable Embedded Systems: Towards the Convergence of High-Performance and Embedded Computing", Proc. 13th IEEE/IFIP Int.l Conf. on Embedded and, Oct. 2015, pp. 148-153.
Abstract, doi:10.1109/EUC.2015.34, SCOPUS: 2-s2.0-84963800598, WOS:000380405500019, INSPEC: 7363629.
BibTeX entry: Giorgi15d.bib.

C54) [Giorgi15b]
R. Giorgi, "Accelerating Haskell on a Dataflow Architecture: a case study including Transactional Memory", Proc. Int.l Conf. on Computer Eng. and Applications, Dubai, UAE, Feb. 2015, pp. 91-100.
Abstract, ISBN: 978-1-61804-276-7, ISSN: 1790-5109.
BibTeX entry: Giorgi15b.bib.

C53) [Scionti14b]
A. Scionti, S. Kavvadias, R. Giorgi, "Dynamic Power Reduction in Self-Adaptive Embedded Systems through Benchmark Analysis", IEEE MECO 2014, Budva, Montenegro, June 2014, pp. 62-65.
Abstract, PDF, doi:10.1109/MECO.2014.6862659, ISBN: 978-9940-9436-3-9, SCOPUS: 2-s2.0-84912061826.
BibTeX entry: Scionti14b.bib.

C52) [Branovic14a]
I. Branovic, R. Popovic, N. Jovanovic, R. Giorgi, B. Nikolic, M. Zivkovic, "Integration of simulators in virtual 3D computer science classroom", Global Engineering Education Conf. (EDUCON), 2014 IEEE, April 2014, pp. 1164-1167.
Abstract, PDF, doi:10.1109/EDUCON.2014.7096837, SCOPUS: 2-s2.0-85002213784.
BibTeX entry: Branovic14a.bib.

C51) [Verdoscia14a]
L. Verdoscia, R. Vaccaro, R. Giorgi, "A Clockless Computing System based on the Static Dataflow Paradigm", Proc. IEEE Int.l Workshop on Data-Flow Execution Models for Extreme Scale Computing (DFM-2014), Edmonton, Canada, Aug. 2014, pp. 30-37.
Abstract, PDF, doi:10.1109/DFM.2014.10, ISBN: 978-147998095-6, SCOPUS: 2-s2.0-84949924153, WOS:000380554400005.
BibTeX entry: Verdoscia14a.bib.

C50) [Ho14a]
N. Ho, A. Portero, M. Solinas, A. Scionti, A. Mondelli, P. Faraboschi, R. Giorgi, "Simulating a Multi-core x86-64 Architecture with Hardware ISA Extension Supporting a Data-Flow Execution Model", IEEE Proc. AIMS-2014, Madrid, Spain, Nov. 2014, pp. 264-269.
Abstract, PDF, doi:10.1109/AIMS.2014.41, ISBN: 978-1-4799-7600-3, SCOPUS: 2-s2.0-84939287422, WOS:000380431100046.
BibTeX entry: Ho14a.bib.

C49) [Giorgi14b]
R. Giorgi, P. Faraboschi, "An Introduction to DF-Threads and their Execution Model", IEEE MPP, Paris, France, Oct. 2014, pp. 60-65.
Abstract, PDF, doi:10.1109/SBAC-PADW.2014.30, ISBN: 978-1-4799-7014-8, SCOPUS: 2-s2.0-84939287413, INSPEC: 14792609.
BibTeX entry: Giorgi14b.bib.

C48) [Solinas13a]
M. Solinas, M. Badia, F. Bodin, A. Cohen, P. Evripidou, P. Faraboschi, B. Fechner, G. Gao, A. Garbade, S. Girbal, D. Goodman, B. Khan, S. Koliaï, F. Li, M. Lujàn, A. Mendelson, L. Morin, N. Navarro, A. Pop, P. Trancoso, T. Ungerer, M. Valero, S. Weis, S. Zuckerman, R. Giorgi, "The TERAFLUX project: Exploiting the dataflow paradigm in next generation teradevices", IEEE Proc. 16th EUROMICRO-DSD, Santander, Spain, no. 6628287, 2013, pp. 272-279.
Abstract, PDF, doi:10.1109/DSD.2013.39, ISBN: 978-0-7695-5074-9, ISSN: N/A, SCOPUS: 2-s2.0-84890041280, WOS:000337235200036.
BibTeX entry: Solinas13a.bib.

C47) [Keramidas13a]
G. Keramidas, S. Wong, F. Anjam, A. Brandon, R. Seedorf, C. Scordino, L. Carro, D. Matos, R. Giorgi, S. Kavvadias, S. McKee, B. Goel, V. Spiliopoulos, "Embedded Reconfigurable Computing: the ERA Approach", Proc. 11th IEEE Int.l Conf. on Industrial Informatics, Bochum, Germany, July 2013, pp. 827-832.
Abstract, PDF, doi:10.1109/INDIN.2013.6889116, SCOPUS: 2-s2.0-84927611964, INSPEC: 14563415.
BibTeX entry: Keramidas13a.bib.

C46) [Wong12a]
S. Wong, L. Carro, S. Kavvadias, G. Keramidas, F. Papariello, C. Scordino, R. Giorgi, S. Kaxiras, "Embedded reconfigurable architectures", ACM Proc. 2012 international conference on Compilers, architectures and synthesis for embedded systems (CASES), New York, NY, USA, 2012, pp. 2.
Abstract, PDF, doi:10.1145/2380403.2380444, ISBN: 978-1-4503-1424-4, ISSN: N/A, SCOPUS: 2-s2.0-84869001529, WOS:000324163200029.
BibTeX entry: Wong12a.bib.

C45) [Portero12a]
A. Portero, A. Scionti, Z. Yu, P. Faraboschi, C. Concatto, L. Carro, A. Garbade, S. Weis, T. Ungerer, R. Giorgi, "Simulating the Future kilo-x86-64 core Processors and their Infrastructure", 45th Annual Simulation Symp. (ANSS12), Orlando, FL, Mar 2012, pp. 62-67.
Abstract, PDF, ISBN: 978-1-61839-784-3, SCOPUS: 2-s2.0-84876493480.
BibTeX entry: Portero12a.bib.

C44) [Giorgi12b]
R. Giorgi, "TERAFLUX: Exploiting Dataflow Parallelism in Teradevices", ACM Computing Frontiers, Cagliari, Italy, May 2012, pp. 303-304.
Abstract, PDF, doi:10.1145/2212908.2212959, ISBN: 978-1-4503-1215-8, SCOPUS: 2-s2.0-84862644101.
BibTeX entry: Giorgi12b.bib.

C43) [Giorgi12a]
R. Giorgi, A. Scionti, A. Portero, P. Faraboschi, "Architectural Simulation in the Kilo-core Era", Architectural Support for Programming Languages and Operating Systems (ASPLOS 2012), poster presentation, London, UK, Mar 2012, pp. 1-3.
Abstract, PDF.
BibTeX entry: Giorgi12a.bib.

C42) [Yu11b]
Z. Yu, A. Righi, R. Giorgi, "A Case Study on the Design Trade-off of a Thread Level Data Flow based Many-core Architecture", Future Computing, Rome, Italy, Sept. 2011, pp. 100-106, Best paper award.
Abstract, PDF, ISBN: 978-1-61208-154-0.
BibTeX entry: Yu11b.bib.

C41) [Wong11a]
S. Wong, A. Brandon, F. Anjam, R. Seedorf, R. Giorgi, Z. Yu, N. Puzovic, S. McKee, Magnus Sjaelander and Georgios Keramidas, "Early Results from ERA – Embedded Reconfigurable Architectures", 9th IEEE Int.l Conf. on Industrial Informatics (INDIN), Lisbon, Portugal, Jul 2011, pp. 816-822.
Abstract, PDF, doi:10.1109/INDIN.2011.6034998, ISBN: 978-1-4577-0433-8, ISSN: 1935-4576, SCOPUS: 2-s2.0-80055020953, WOS:000298743300125.
BibTeX entry: Wong11a.bib.

C40) [Weis11a]
S. Weis, A. Garbade, J. Wolf, B. Fechner, A. Mendelson, R. Giorgi, T. Ungerer, "A Fault Detection and Recovery Architecture for a Teradevice Dataflow System", Proc. IEEE Int.l Workshop on Data-Flow Execution Models for Extreme Scale Computing (DFM), Oct. 2011, pp. 38-44.
Abstract, PDF, doi:10.1109/DFM.2011.9, ISBN: 978-1-4673-0709-3, SCOPUS: 2-s2.0-84860536526, INSPEC: 12654360.
BibTeX entry: Weis11a.bib.

C39) [Giorgi11a]
R. Giorgi, "TERAFLUX: Ideas for the Future Many-Cores", ODES: Workshop on Optimizations for DSP and Embedded Systems, Apr. 2011, pp. 38-38.
Abstract, PDF.
BibTeX entry: Giorgi11a.bib.

C38) [Puzovic10a]
N. Puzovic, S. McKee, R. Eres, A. Zaks, P. Gai, S. Wong, R. Giorgi, "A Multi-Pronged Approach to Benchmark Characterization", IEEE Int.l Conf. on Cluster Computing (CLUSTER2010), Heraklion, Greece, Sept. 2010, pp. 1-4.
Abstract, PDF, doi:10.1109/CLUSTERWKSP.2010.5613090, ISBN: 978-1-4244-8396-9, SCOPUS: 2-s2.0-78649899217.
BibTeX entry: Puzovic10a.bib.

C37) [Alioto10a]
C. M. B. Alioto, P. Bennati, R. Giorgi, "Exploiting Locality to Improve Leakage Reduction in Embedded Drowsy I-Caches at Same Area/Speed", IEEE Int.l Symp. on Circuits and Systems (ISCAS), Paris, France, May 2010, pp. 37-40.
Abstract, PDF, doi:10.1109/ISCAS.2010.5537105, ISBN: 978-1-4244-5309-2, ISSN: 0271-4302, SCOPUS: 2-s2.0-77955986564, WOS:000287216000010.
BibTeX entry: Alioto10a.bib.

C36) [Stavrou09a]
K. Stavrou, D. Pavlou, M. Nikolaides, P. Petrides, P. Evripidou, P. Trancoso, Z. Popovic, R. Giorgi, "Programming Abstractions and Toolchain for Dataflow Multithreading Architectures", IEEE Proc. Eighth Int.l Symp. on Parallel and Distributed Computing (ISPDC 2009), Lisbon, Portugal, July 2009, pp. 107-114.
Abstract, PDF, doi:10.1109/ISPDC.2009.35, ISBN: 978-0-7695-3680-4, ISSN: N/A, SCOPUS: 2-s2.0-74349119578, WOS:000275741200013.
BibTeX entry: Stavrou09a.bib.

C35) [Giorgi09c]
R. Giorgi, Z. Popovic, N. Puzovic, "Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture", Proc. 9th Int.l Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2009, Samos, Greece, July 2009, pp. 78-87.
Abstract, PDF, doi:10.1007/978-3-642-03138-0_9, ISBN: 978-3-642-03137-3, ISSN: 0302-9743, SCOPUS: 2-s2.0-70350359181, WOS:000270018700009.
BibTeX entry: Giorgi09c.bib.

C34) [Giorgi09b]
R. Giorgi, Z. Popovic, N. Puzovic, "Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture", Proc. IEEE Int.l Symp. on Parallel and Distributed, Rome, Italy, May 2009, pp. 2197-2204.
Abstract, PDF, doi:10.1109/IPDPS.2009.5161111, ISBN: 978-1-4244-3751-1, ISSN: 1530-2075, SCOPUS: 2-s2.0-70449913551, WOS:000272993601035.
BibTeX entry: Giorgi09b.bib.

C33) [Giorgi09a]
R. Giorgi, Z. Popovic, N. Puzovic, "Introducing hardware TLP support for the Cell processor", Proc. IEEE Int.l Workshop on Multi-Core Computing Systems, Fukuoka, Japan, Mar. 2009, pp. 657-662.
Abstract, PDF, doi:10.1109/CISIS.2009.177, ISBN: 978-1-4244-3569-2, ISSN: N/A, SCOPUS: 2-s2.0-70349735998, WOS:000272961700096.
BibTeX entry: Giorgi09a.bib.

C32) [Giorgi08e]
R. Giorgi, P. Bennati, "Reducing Leakage through Filter Cache", IEEE Proc. 11th EUROMICRO-DSD, Parma, Italy, Sept. 2008, pp. 334-341.
Abstract, PDF, doi:10.1109/DSD.2008.123, ISBN: 978-1-59593-753-7, ISSN: N/A, SCOPUS: 2-s2.0-57649239603, WOS:000264279400043.
BibTeX entry: Giorgi08e.bib.

C31) [Giorgi08d]
R. Giorgi, Z. Popovic, N. Puzovic, A. Azavedo, B. Juurlink, "Analyzing Scalability of Deblocking Filter of H.264 via TLP exploitation in a new many-core architecture", IEEE Proc. 11th EUROMICRO-DSD, Parma, Italy, Sept. 2008, pp. 189-194.
Abstract, PDF, doi:10.1109/DSD.2008.93, ISBN: 978-1-59593-753-7, ISSN: N/A, SCOPUS: 2-s2.0-57649199756, WOS:000264279400025.
BibTeX entry: Giorgi08d.bib.

C30) [Giorgi08a]
R. Giorgi, P. Bennati, "Filtering drowsy instruction cache to achieve better efficiency", SAC '08: Proc. 2008 ACM symposium on Applied computing, New York, NY, USA, Mar. 2008, pp. 1554-1555.
Abstract, PDF, doi:10.1145/1363686.1364050, ISBN: 978-1-59593-753-7, ISSN: N/A, SCOPUS: 2-s2.0-56749156882, WOS:000268392201137.
BibTeX entry: Giorgi08a.bib.

C29) [Giorgi07b]
R. Giorgi, P. Bennati, "Reducing leakage in power-saving capable caches for embedded systems by using a filter cache", Proc. ACM MEDEA, Brasov, Romania, Sept. 2007, pp. 105-112.
Abstract, PDF, doi:10.1145/1327171.1327183, ISBN: 978-1-59593-807-7, SCOPUS: 2-s2.0-77954436701.
BibTeX entry: Giorgi07b.bib.

C28) [Giorgi07a]
R. Giorgi, Z. Popovic, N. Puzovic, "DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems", Proc. IEEE SBAC-PAD, Gramado, Brasil, Oct. 2007, pp. 263-270.
Abstract, PDF, doi:10.1109/SBAC-PAD.2007.27, ISBN: 0-7695-23014-1, ISSN: 1550-6533, SCOPUS: 2-s2.0-47249097035, WOS:000252137000031, INSPEC: 9855214.
BibTeX entry: Giorgi07a.bib.

C27) [Bennati06a]
P. Bennati, R. Giorgi, "JCacheSim: simulatore visuale di gerarchia di memoria con interprete per programmi MIPS", AICA Didamatica, Cagliari, Italy, May 2006, pp. 105-114.
Abstract, PDF.
BibTeX entry: Bennati06a.bib.

C26) [Bartolini06c]
S. Bartolini, P. Bennati, R. Giorgi, "BLUESIGN: traduttore multimediale portatile per non udenti", AICA Didamatica, Cagliari, Italy, May 2006, pp. 17-24.
Abstract, PDF.
BibTeX entry: Bartolini06c.bib.

C25) [Bartolini05c]
S. Bartolini, P. Bennati, R. Giorgi, "Bluesign-2, il nuovo visualizzatore portatile per la Lingua Italiana dei Segni", Atti del 51esimo Convegno Nazionale di Studio ed Aggiornamento AIES, S. Pellegrino (BG), Italy, Aug. 2005, pp. 140-145.
Abstract, PDF.
BibTeX entry: Bartolini05c.bib.

C24) [Branovic04a]
I. Branovic, R. Giorgi, E. Martinelli, "WebMIPS: A New Web-Based MIPS Simulation Environment for Computer Architecture Education.", IEEE Workshop on Computer Architecture Education (WCAE-04), Munich, Germany, June 2004, pp. 93-98.
Abstract, PDF, doi:10.1145/1275571.1275596, SCOPUS: 2-s2.0-84897704899.
BibTeX entry: Branovic04a.bib.

C23) [Bartolini04b]
S. Bartolini, P. Bennati, R. Giorgi, "Sistema per la traduzione in Lingua Italiana dei Segni: Blue Sign Translator / Wireless Sign System", Atti del 50esimo Convegno Nazionale di Studio ed Aggiornamento AIES, Chianciano Terme - Siena, Italy, Aug. 2004, pp. 203-212.
Abstract, PDF.
BibTeX entry: Bartolini04b.bib.

C22) [Bartolini04a]
S. Bartolini, I. Branovic, R. Giorgi, E. Martinelli, "A Performance Evaluation of ARM ISA Extension for Elliptic Curve Cryptography over Binary Finite Fields", IEEE 16th Symp. on Computer Architecture and High Performance Computing (SBAC-PAD-04), Foz do Iguacu, Brasil, Oct. 2004, pp. 238-245.
Abstract, PDF, doi:10.1109/SBAC-PAD.2004.5, ISBN: 0-7695-2240-8, ISSN: 1550-6533, SCOPUS: 2-s2.0-16244420738, WOS:000225222600030.
BibTeX entry: Bartolini04a.bib.

C21) [Foglia03a]
P. Foglia, R. Giorgi, C. Prete, "Speeding-up Multiprocessors Running DSS Workloads through Coherence Protocols", 2nd Workshop on Hardware Software Support for Parallel and, New Orleans, LA, USA, Sept. 2003, pp. 124-149.
Abstract, PDF.
BibTeX entry: Foglia03a.bib.

C20) [Branovic03a]
I. Branovic, R. Giorgi, E. Martinelli, "Memory Performance of Public-Key cryptography Methods in Mobile Environments", ACM SIGARCH Workshop on MEmory performance: DEaling with Applications, systems and architecture (MEDEA-03), New Orleans, LA, USA, Sept. 2003, pp. 24-31.
Abstract, PDF.
BibTeX entry: Branovic03a.bib.

C19) [Foglia02a]
P. Foglia, R. Giorgi, C. Prete, "Boosting the Performance of Three-Tier Web Servers Deploying SMP Architecture", Springer-Verlag LNCS Workshop on Web Engineering (WWE-02), Pisa, Italy, vol. 2376, May 2002, pp. 134-146.
Abstract, PDF, doi:N/A, ISBN: 3-540-44177-8, ISSN: 0302-9743, SCOPUS: 2-s2.0-84885225152, WOS:000187251900012.
BibTeX entry: Foglia02a.bib.

C18) [Branovic02a]
I. Branovic, R. Giorgi, C. A, "Web-based training on Computer Architecture: The case for JCachesim", IEEE Workshop on Computer Architecture Education (WCAE-02), Anchorage, AK, USA, May 2002, pp. 56-60.
Abstract, PDF, SCOPUS: 2-s2.0-84969262570.
BibTeX entry: Branovic02a.bib.

C17) [Kavi01b]
K. Kavi, J. Arul, R. Giorgi, "Performance Evaluation of a Non-Blocking Multithreaded Architecture for Embedded, Real-Time and DSP Applications", 14th Int.l Conf. on Parallel and Distributed Computing Systems (ISCA-PDCS-01), Richardson, TX, USA, Aug. 2001, pp. 365-371.
Abstract, PDF, doi:N/A, ISBN: 1-880843-39-0, ISSN: N/A, WOS:000179289500059.
BibTeX entry: Kavi01b.bib.

C16) [Foglia01e]
P. Foglia, R. Giorgi, C. Prete, "OS Effects on Memory Hierarchy of a SMP Multiprocessor Running a DBMS Workload", Int.l Conf. on Advances in Infrastructure for E-Business, Science, and Education (SSGRR-01), L'Aquila, Italy, Aug. 2001, pp. 1-8 (cdrom).
Abstract, PDF, ISBN: 88-85280-61-7.
BibTeX entry: Foglia01e.bib.

C15) [Foglia01d]
P. Foglia, R. Giorgi, C. Prete, "Accelerating DSS Workloads through Coherence Protocols", ACM Workshop on Caching and Coherence Consistency (WC3-01), Sorrento, Italy, June 2001, pp. G.1-G.8.
Abstract, PDF.
BibTeX entry: Foglia01d.bib.

C14) [Foglia01c]
P. Foglia, R. Giorgi, C. Prete, "Performance Analysis of Parallel Applications Running on SMP", Int.l Conf. on Parallel and Distributed Processing Techniques and Applications (PDPTA-01), Las Vegas, NV, USA, vol. IV, June 2001, pp. 1634-1640.
Abstract, PDF, doi:N/A, ISBN: 1-892512-70-X, ISSN: N/A, WOS:000174014500247.
BibTeX entry: Foglia01c.bib.

C13) [Foglia01a]
P. Foglia, R. Giorgi, C. Prete, "Evaluating Optimizing for Multiprocessors E-Commerce Server Running TPC-W Workload", IEEE Proc. 34th Annual Hawaii Int.l Conf. on System Sciences (HICSS-34), Maui, Hawaii, USA, vol. 7, Jan. 2001, pp. 2544-2552.
Abstract, PDF, doi:10.1109/HICSS.2001.927077, ISBN: 0-7695-0981-9, SCOPUS: 2-s2.0-0034974343, INSPEC: 6859484.
BibTeX entry: Foglia01a.bib.

C12) [Kavi00b]
K. Kavi, R. Giorgi, J. Arul, "Comparing Execution Performance of Scheduled Dataflow Architecture with RISC Processors", Proc. 13th ISCA Parallel and Distributed Computing Systems Conf. (ISCA-PDCS-00), Las Vegas, NV, USA, Aug. 2000, pp. 41-47.
Abstract, PDF, doi:N/A, ISBN: 1-880843-34-X, ISSN: N/A, WOS:000179773600007.
BibTeX entry: Kavi00b.bib.

C11) [Foglia00a]
P. Foglia, R. Giorgi, C. Prete, "Performance Analysis of Electronic Commerce Multiprocessor Servers", IEEE Proc. 33th Annual Hawaii Int.l Conf. on System Sciences (HICSS-33), Maui, Hawaii, USA, Jan. 2000, pp. 2214-2222.
Abstract, PDF, ISBN: 0-7695-0493-0, SCOPUS: 2-s2.0-0033885039.
BibTeX entry: Foglia00a.bib.

C10) [Giorgi99d]
R. Giorgi, C. Prete, "A Coherence Protocol for the Elimination of Passive Sharing in Single and Multiple Threaded Shared-Bus Shared-Memory Multiprocessors", Eighth Workshop on Scalable Shared Memory Multiprocessors (WSSMM-99), Atlanta, Georgia, May 1999, pp. 29.
Abstract, PDF.
BibTeX entry: Giorgi99d.bib.

C9) [Foglia99a]
P. Foglia, R. Giorgi, C. Prete, "Process Migration Effects on Memory Performance of Multiprocessor Web-Server", Springer-Verlag LNCS Proc. High Performance Computing Conf. (HIPC-99), Calcutta, India, vol. 1745, Dec. 1999, pp. 133-142.
Abstract, PDF, ISBN: 3-540-66907-8, SCOPUS: 2-s2.0-70349176898.
BibTeX entry: Foglia99a.bib.

C8) [Giorgi98b]
R. Giorgi, C. Prete, "An Educational Environment for Designing and Performance Tuning of Embedded Systems", IEEE Workshop on Computer Architecture Education (WCAE-98), Barcelona, Spain, June 1998, pp. VII/A.1-6.
Abstract, PDF, doi:10.1145/1275182.1275211, ISBN: 978-1-4503-4736-5, SCOPUS: 2-s2.0-84977079593.
BibTeX entry: Giorgi98b.bib.

C7) [Foglia98a]
P. Foglia, R. Giorgi, C. Prete, "Analysis of Sharing Overhead in Shared Memory Multiprocessors", IEEE Proc. 31st Annual Hawaii Int.l Conf. on System Sciences (HICSS-31), Big Island, Hawaii, USA, vol. 7, Jan. 1998, pp. 776-777.
Abstract, PDF, doi:N/A, ISBN: 0-8186-8255-8, ISSN: 1060-3425, SCOPUS: 2-s2.0-0031612524, WOS:000072158800092.
BibTeX entry: Foglia98a.bib.

C6) [Giorgi97f]
R. Giorgi, C. Prete, G. Prina, "An Educational Environment for Program Behavior Analysis and Cache Memory Design", IEEE Proceedings Int.l Conf. on Frontiers in Education (FIE-97), Pittsburgh, PA, USA, Nov. 1997, pp. 1243-1248.
Abstract, PDF, doi:N/A, ISBN: 0-7803-4087-6, ISSN: 0190-5848, SCOPUS: 2-s2.0-0031335181, WOS:A1997BJ93M00289.
BibTeX entry: Giorgi97f.bib.

C5) [Giorgi97d]
R. Giorgi, C. Prete, G. Prina, "An approach for investigating design and tuning performance of embedded systems", EAEEIE Proc. Int.l Conf. on Innovation and Quality in Education for Electrical and Information Engineering, Edinburgh, Scotland, UK, June 1997, pp. G1.15-20.
Abstract, PDF.
BibTeX entry: Giorgi97d.bib.

C4) [Giorgi97c]
R. Giorgi, P. Foglia, C. Prete, "Bus Utilization Analysis of Multithreaded Shared-Bus Multiprocessors: Initial Results", IASTED Proc. 9th Int.l Conf. on Parallel and Distributed Computing and Systems (IPDCS-97), Washington, DC, USA, Oct. 1997, pp. 24-29.
Abstract, PDF, ISBN: 0-88986-240-0.
BibTeX entry: Giorgi97c.bib.

C3) [Giorgi97b]
R. Giorgi, C. Prete, G. Prina, "Cache Memory Design for Embedded Systems Based on Program Locality Analysis", IEEE Proc. Int.l Conf. on Microelectronic System Education (MSE-97), Arlington, VA, USA, July 1997, pp. 16-18.
Abstract, PDF, doi:10.1109/MSE.1997.612528, ISBN: 0-8186-7996-4, ISSN: N/A, SCOPUS: 2-s2.0-0030681889, WOS:A1997BJ30F00007.
BibTeX entry: Giorgi97b.bib.

C2) [Giorgi97a]
R. Giorgi, C. Prete, G. Prina, L. Ricciardi, "A Workload Generation Environment for Trace-Driven Simulation of Shared-Bus Multiprocessor", IEEE Proc. 30th Hawaii Int.l Conf. on System Sciences (HICSS-30), Maui, Hawaii, vol. 1, Jan. 1997, pp. 266-275, Best mini-track paper award.
Abstract, PDF, doi:10.1109/HICSS.1997.667272, ISBN: 0-8186-7734-1, ISSN: 1060-3425, SCOPUS: 2-s2.0-0031348221, WOS:000073324200030.
BibTeX entry: Giorgi97a.bib.

C1) [Giorgi96a]
R. Giorgi, C. Prete, G. Prina, L. Ricciardi, "A Hybrid Approach to Trace Generation for Performance Evaluation of Shared-Bus Multiprocessors", IEEE Proc. 22nd EuroMicro Int.l Conf. (EM-96), Prague, Ceck Republic, Sept. 1996, pp. 207-214.
Abstract, PDF, doi:10.1109/EURMIC.1996.546384, ISBN: 0-8186-7487-3.
BibTeX entry: Giorgi96a.bib.

PAPERS: Miscellanous

M5) [Antunovic19-ipsi]
V. Antunovic, I. Bozovic, S. Cloetingh, N. Dakovic, N. Delilovic, M. Djukanovic, B. Furht, R. Giorgi, A. Kavcic, E. Kondorosi, M. Lazic, H. Maurer, O. Mencer, F. Mesinger, M. Mihaljevic, V. Milutinovic, D. Mircevski, L. Moutinho, Z. Ognjanovic, P. Papale, O. Petersen, M. Radovic-Markovic, S. Rizvic, J. Salom, A. Verkhratsky, G. Vunjak-Novakovic, B. Zlokovic, "Proverbial Opinions of Selected Experts: From Past Experiences to Future Directions", IPSI Trans. Advanced Research, vol. 16, Dec 2019, pp. 50-61.
Abstract, PDF.
BibTeX entry: Antunovic19-ipsi.bib.

M4) [Giorgi07d]
R. Giorgi, Z. Popovic, N. Puzovic, "Memory access decoupling in a multithreaded architecture", WIRTES 2007 - Primo Workshop Italiano su Real-Time Embedded Systems, Pisa, Italy, July 2007, pp. 1-11.
Abstract.
BibTeX entry: Giorgi07d.bib.

M3) [Bartolini05a]
S. Bartolini, R. Giorgi, E. Martinelli, Z. Popovic, "Tiled Architectures and Recent Proposals for Chip", , no. 5, May 2005, pp. 23.
Abstract, PDF.
BibTeX entry: Bartolini05a.bib.

M2) [Giorgi99b]
R. Giorgi, "Evaluation of a Coherence Protocol for Eliminating Passive Sharing in Shared-BusMultithreaded Multiprocessors", University of Pisa, Dept. Ingegneria della Informazione, Ph.D. Thesis, Pisa, Italy, Jan. 1999, pp. 84.
Abstract, PDF.
BibTeX entry: Giorgi99b.bib.

M1) [Giorgi95a]
R. Giorgi, "Valutazione delle Prestazioni di Sistemi Multiprocessore Basata sull'Analisi di Tracce Reali", University of Pisa, Dept. Ingegneria della Informazione, MS Thesis, Pisa, Italy, July 1995, pp. 96.
Abstract, PDF.
BibTeX entry: Giorgi95a.bib.

Poster Papers

P24) [Sahebi20-acaces]
A. Sahebi, R. Giorgi, "GLUON, The High-Speed Inexpensive and Easy Interconnect Solution", HiPEAC ACACES 2020 Online Event, Fiuggi, Italy, July 2020, (online poster).
Abstract, PDF, ISBN: 978-90-784270-0-1.
BibTeX entry: Sahebi20-acaces.bib.

P23) [Procaccini20-acaces]
M. Procaccini, R. Giorgi, "An Extended Tracing System for the COTSon Simulator", HiPEAC ACACES-2020, Fiuggi, Italy, July 2020, (poster).
Abstract, PDF, ISBN: 978-90-784270-0-1.
BibTeX entry: Procaccini20-acaces.bib.

P22) [Mariotti20-acaces]
G. Mariotti, R. Giorgi, "WebRISC-V: A RISC-V Educational Simulator featuring RV64IM, Pipeline and Web-Based UI", HiPEAC ACACES-2020, Fiuggi, Italy, July 2020, pp. 19-22, (Online poster).
Abstract, PDF, ISBN: 978-90-784270-0-1.
BibTeX entry: Mariotti20-acaces.bib.

P21) [Khalili20-acaces]
F. Khalili, R. Giorgi, "A Dynamic Load Balancer for a Cluster of FPGA SoCs", HiPEAC ACACES-2020, Fiuggi, Italy, July 2020, (Online poster).
Abstract, PDF, ISBN: 978-90-784270-0-1.
BibTeX entry: Khalili20-acaces.bib.

P20) [Sahebi19-acaces]
A. Sahebi, L. Verdoscia, R. Giorgi, "A Data-Flow Approach To Accelerate Real-Valued Fast Fourier Transform", HiPEAC ACACES-2019, Fiuggi, Italy, July 2019, pp. 155-158, (poster).
Abstract, PDF, ISBN: 978-88-905806-7-3.
BibTeX entry: Sahebi19-acaces.bib.

P19) [Procaccini19-acaces]
M. Procaccini, R. Giorgi, "x86\_64 vs Aarch64 Performance Validation with COTSon", HiPEAC ACACES-2019, Fiuggi, Italy, July 2019, pp. 261-264, (poster).
Abstract, PDF, ISBN: 978-88-905806-7-3.
BibTeX entry: Procaccini19-acaces.bib.

P18) [Khalili19-acaces]
F. Khalili, R. Giorgi, "A Soft-IP for Performance Measuring of the Zynq Ultrascale+ CPU/FPGA interface", HiPEAC ACACES-2019, Fiuggi, Italy, July 2019, pp. 5-8, (poster).
Abstract, PDF, ISBN: 978-88-905806-7-3.
BibTeX entry: Khalili19-acaces.bib.

P17) [Procaccini18-acaces]
M. Procaccini, F. Khalili, R. Giorgi, "An FPGA-based Scalable Hardware Scheduler for Data-Flow Models", HiPEAC ACACES-2018, Fiuggi, Italy, July 2018, pp. 1-4, (poster).
Abstract, PDF, ISBN: 978-88-905806-6-6.
BibTeX entry: Procaccini18-acaces.bib.

P16) [Khalili18-acaces]
F. Khalili, M. Procaccini, R. Giorgi, "Reconfigurable Logic Interface Architecture for CPU-FPGA Accelerators", HiPEAC ACACES-2018, Fiuggi, Italy, July 2018, pp. 1-4, (poster).
Abstract, PDF, ISBN: 978-88-905806-6-6.
BibTeX entry: Khalili18-acaces.bib.

P15) [Giorgi18-fpode]
R. Giorgi, F. Khalili, M. Procaccini, "An FPGA-based Scalable Hardware Scheduler for Data-Flow Models", Int.l workshop on FPGAS for Domain Experts (FPODE), Limassol, Cyprus, Nov. 2018, pp. 1-1, (poster).
Abstract, PDF.
BibTeX entry: Giorgi18-fpode.bib.

P14) [Procaccini17-acaces]
M. Procaccini, R. Giorgi, "Simulation infrastructure for the next kilo x86-64 Chips", HiPEAC ACACES-2017, Fiuggi, Italy, Julyy 2017, pp. 91-94, (poster).
Abstract, PDF, ISBN: 978 88 905806 5 9.
BibTeX entry: Procaccini17-acaces.bib.

P13) [Portero12b]
A. Portero, A. Scionti, M. Solinas, H. Nam, R. Giorgi, "Simulation infrastructure for the next kilo x86-64 Chips", HiPEAC ACACES-2012, Fiuggi, Italy, July 2012, pp. 87-90, (poster).
Abstract, PDF, ISBN: 978 90 382 19.
BibTeX entry: Portero12b.bib.

P12) [Kang12a]
C. Kang, S. Kavvadias, A. Scionti, C. Scordino, P. Gai, R. Giorgi, "Dynamically Reconfiguring through Phase Detection on FPGA", HiPEAC ACACES-2012, Fiuggi, Italy, July 2012, pp. 149-152, (poster).
Abstract, PDF, ISBN: 978 90 382 1987 5.
BibTeX entry: Kang12a.bib.

P11) [Yu11a]
Z. Yu, N. Puzovic, A. Portero, R. Giorgi, "Characterizing Phase Behavior for Dynamically Reconfigurable Architectures", HiPEAC ACACES-2011, Fiuggi, Italy, July 2011, pp. 89-92, (poster).
Abstract, PDF, ISBN: 978 90 382 17987.
BibTeX entry: Yu11a.bib.

P10) [Portero11b]
A. Portero, Z. Yu, R. Giorgi, "T-Star (T*): An x86-64 ISA Extension to support thread execution on many cores", HiPEAC ACACES-2011, Fiuggi, Italy, July 2011, pp. 277-280, (poster).
Abstract, PDF, ISBN: 978 90 382 17987.
BibTeX entry: Portero11b.bib.

P9) [Giorgi08c]
R. Giorgi, Z. Popovic, N. Puzovic, "Implementing DTA support in CellSim", HiPEAC ACACES-2008, L'Aquila, Italy, July 2008, pp. 159-162, (poster).
Abstract, PDF, ISBN: 978-90-382-1288-3.
BibTeX entry: Giorgi08c.bib.

P8) [Giorgi08b]
R. Giorgi, Z. Popovic, N. Puzovic, A. Azavedo, B. Juurlink, "Exploiting Parallelism of Deblocking Filter of H.264 on DTA architecture", HiPEAC ACACES-2008, L'Aquila, Italy, July 2008, pp. 55-58, (poster).
Abstract, PDF, ISBN: 978-90-382-1288-3.
BibTeX entry: Giorgi08b.bib.

P7) [Giorgi07c]
R. Giorgi, Z. Popovic, N. Puzovic, "Decoupled Threaded Architecture", HiPEAC ACACES-2007, L'Aquila, Italy, July 2007, pp. 119-121, (poster).
Abstract, PDF, ISBN: 97-890-382-1127-5.
BibTeX entry: Giorgi07c.bib.

P6) [Bennati07a]
P. Bennati, R. Giorgi, "Adaptive Cache Decay", HiPEAC ACACES-2007, L'Aquila, Italy, July 2007, pp. 1-4, (poster).
Abstract, PDF, ISBN: 97-890-382-1127-5.
BibTeX entry: Bennati07a.bib.

P5) [Giorgi06b]
R. Giorgi, N. Puzovic, "Scheduling and NoC Traffic Reduction in T-SDF Architecture", HiPEAC ACACES-2006, L'Aquila, Italy, July 2006, pp. 253-256, (poster).
Abstract, PDF, ISBN: 90-382-0981-9.
BibTeX entry: Giorgi06b.bib.

P4) [Giorgi06a]
R. Giorgi, Z. Popovic, "Core Design and Scalability of Tiled SDF Architecture", HiPEAC ACACES-2006, L'Aquila, Italy, July 2006, pp. 145-148, (poster).
Abstract, PDF, ISBN: 90-382-0981-9.
BibTeX entry: Giorgi06a.bib.

P3) [Bartolini06a]
S. Bartolini, P. Bennati, R. Giorgi, E. Martinelli, "Elliptic Curve Cryptography support for ARM based Embedded systems", HiPEAC ACACES-2006, L'Aquila, Italy, July 2006, pp. 13-16, (poster).
Abstract, PDF, ISBN: 90-382-0981-9.
BibTeX entry: Bartolini06a.bib.

P2) [Bartolini05b]
S. Bartolini, R. Giorgi, E. Martinelli, Z. Popovic, "Recent Proposals for Tiled Architectures Multiprocessors", HiPEAC ACACES-2005, L'Aquila, Italy, July 2005, pp. 47-50, (poster).
Abstract, PDF, ISBN: 90-382-0802-2.
BibTeX entry: Bartolini05b.bib.

P1) [Alioto05a]
M. Alioto, S. Bartolini, P. Bennati, R. Giorgi, "New techniques for low power caches", HiPEAC ACACES-2005, L'Aquila, Italy, July 2005, pp. 133-136, (poster).
Abstract, PDF, ISBN: 90-382-0802-2.
BibTeX entry: Alioto05a.bib.

Technical Reports (Project Deliverables)

D20) [Giorgi18-axmd73]
R. Giorgi, F. Khalili, F. Montefoschi, M. Procaccini, X. Martorell, D. Jiménez-González, A. C., P. Gai, S. Garzarella, V. Amourianos, D. Theodoropoulos, D. Pnevmatikatos, D. Oro, D. Catani, D. Cardillo, C. Magnani, S. Viola, N. Bettin, A. Pomella, "Performance and Energy Evaluation of AXIOM", AXIOM D7.3, Siena, Italy, Feb 2018, pp. 1-54, (deliverable).
PDF.
BibTeX entry: Giorgi18-axmd73.bib.

D19) [Gai18-axmd54]
P. Gai, S. Garzarella, B. Morelli, M. X., D. Jiménez-González, A. C., F. Procaccini and M. and Khalili, R. Giorgi, "Final operating system and documentation", AXIOM D5.4, Siena, Italy, Feb 2018, pp. 1-31, (deliverable).
PDF.
BibTeX entry: Gai18-axmd54.bib.

D18) [Caporali18-axmd24]
M. Caporali, A. Rovai, R. Giorgi, "Final Rep. on AXIOM Events", AXIOM D2.4, Siena, Italy, Feb 2018, pp. 1-28, (deliverable).
PDF.
BibTeX entry: Caporali18-axmd24.bib.

D17) [Giorgi17-axmd72]
R. Giorgi, S. Viola, "Design Space Exploration (DSE) on the prototype", AXIOM D7.2, Siena, Italy, Feb 2017, pp. 1-36, (deliverable).
PDF.
BibTeX entry: Giorgi17-axmd72.bib.

D16) [Caporali17-axmd22]
M. Caporali, A. Rovai, R. Giorgi, "Rep. on AXIOM Events", AXIOM D2.2, Siena, Italy, Feb 2017, pp. 1-59, (deliverable).
PDF.
BibTeX entry: Caporali17-axmd22.bib.

D15) [Giorgi16-axmd71]
R. Giorgi, "Design Space Exploration (DSE) on the prototype", AXIOM D7.1, Siena, Italy, Jan 2016, pp. 1-38, (deliverable).
PDF.
BibTeX entry: Giorgi16-axmd71.bib.

D14) [Giorgi16a]
R. Giorgi, "Initial AXIOM Evaluation Platform (AEP) definition and initial tests", AXIOM D7.1, Siena, Italy, Jan 2016, pp. 1-38, (deliverable).
PDF.
BibTeX entry: Giorgi16a.bib.

D13) [Catani16-axmd61]
D. Catani, C. Magnani, X. Martorell, N. Navarro, D. Jiminez-Gonzalez, C. Alvarez, P. Gai, C. Scordino, D. Pnevmatikatos, D. Theodoropoulos, A. Pomella, R. Giorgi, "Tech. specification of AXIOM boards", AXIOM D6.1, Siena, Italy, Jan 2016, pp. 1-23, (deliverable).
PDF.
BibTeX entry: Catani16-axmd61.bib.

D12) [Catani15a]
D. Catani, C. Magnani, X. Martorell, N. Navarro, D. Jiminez-Gonzalez, C. Alvarez, P. Gai, C. Scordino, D. Pnevmatikatos, D. Theodoropoulos, A. Pomella, R. Giorgi, "Tech. specification of AXIOM boards", AXIOM D6.1, Siena, Italy, Oct 2015, pp. 1-23, (deliverable).
PDF.
BibTeX entry: Catani15a.bib.

D11) [Zuckerman14a]
S. Zuckerman, J. Arteaga, J. Suetterlein, H. Wei, E. Garcia, G. Gao, A. Scionti, R. Giorgi, "Evaluation of the Codelet Runtime System on a Teradevice", TERAFLUX D9.3, Siena, Italy, May 2014, pp. 1-53, (deliverable).
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BibTeX entry: Zuckerman14a.bib.

D10) [Scionti14a]
A. Scionti, H. Kifle, S. Mazumdar, R. Giorgi, N. Navarro, R. Badia, M. Valero, S. Weis, T. Ungerer, G. Mathou, T. Trancoso, P. Evripidou, A. Fuchs, Y. Weinsberg, P. Faraboschi, B. Khan, Watson,F. I. Li, A. Cohen, S. Zuckermand, J. Arteaga, G. Gao, L. Morin, S. Girbal, "Final Rep. and Documentation", TERAFLUX D7.5, Siena, Italy, May 2014, pp. 1-100, (deliverable).
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BibTeX entry: Scionti14a.bib.

D9) [Cohen14a]
A. Cohen, F. Gindraud, F. Li, A. Pop, R. Badia, N. Navarro, T. Patejko, I. Watson, B. Khan, M. Lujan, R. Giorgi, A. Mondelli, L. Morin, "Advanced Version of the Compilation Tools", TERAFLUX D4.7, Siena, Italy, May 2014, pp. 1-25, (deliverable).
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BibTeX entry: Cohen14a.bib.

D8) [Badia14a]
R. Badia, D. Jiminez, C. Alvarez, A. Grabade, S. Weis, T. Ungerer, Diavastos,G. A. Mathou, T. Trancoso, P. Evripidou, B. Khan, S. Khan, W. Toms, M. Lujan, I. Watson, R. Giorgi, A. Scionti, B. Jacob, "Evaluation of the TERAFLUX Abstraction Layer and Fine-tuned Model", TERAFLUX D6.4, Siena, Italy, May 2014, pp. 1-65, (deliverable).
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BibTeX entry: Badia14a.bib.

D7) [Solinas12a]
M. Solinas, A. Scionti, M. Mondelli, N. Ho, A. Portero, S. Kavvadias, M. Bianchini, R. Giorgi, A. Garbade, S. Weis, T. Ungerer, A. Pop, F. Li, A. Cohen, L. Eleftheriades, N. Masrujeh, G. Michael, L. Petrou, A. Diavastos, T. Trancoso, P. Evripidou, N. Navarro, R. Badia, M. Valero, P. Faraboschi, B. Khan, S. Khan, M. Lujan, I. Watson, "Rep. on knowledge transfer and training", TERAFLUX D7.4, Siena, Italy, Dec. 2012, pp. 1-50, (deliverable).
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BibTeX entry: Solinas12a.bib.

D6) [Giorgi12c]
R. Giorgi, A. Portero, A. Scionti, A. Garbade, S. Weis, T. Ungerer, "Power and Thermal Modeling and Fault-injection support", TERAFLUX D7.3, Siena, Italy, Mar. 2012, pp. 1-28, (deliverable).
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BibTeX entry: Giorgi12c.bib.

D5) [Christofi13a]
C. Christofi, A. Diavastos, G. Michael, G. Mathou, T. Trancoso, P. Evripidou, M. Solinas, A. Scionti, A. Mondelli, H. Nam, A. Portero, R. Giorgi, B. Khan, S. Khan, M. Lujan, I. Watson, F. Yazdanpanah, D. Jiminez, A. Alvarez, Y. Etsion, R. Badia, "Fine-tuned TERAFLUX Execution Model", TERAFLUX D6.3, Siena, Italy, Dec 2012, pp. 1-34, (deliverable).
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BibTeX entry: Christofi13a.bib.

D4) [Giorgi11b]
R. Giorgi, A. Portero, C. Concatto, R. Mameesh, Z. Yu, Y. Etsion and L. Villanova and N. Navarro and R. Badia and M. Valero and P. Faraboschi and A. Cohen and D. Shamia and A. Mendelson and A. Garbade and S. Weis and T. Ungerer and P. Trancoso and P. Evripidou and B. Khan and S. Khan and M. Lujan and C. Kirkham and I. Watson, "Definition of ISA extensions, custom devices and External COTSon API extensions", TERAFLUX D7.2, Siena, Italy, Mar. 2011, pp. 1-78, (deliverable).
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BibTeX entry: Giorgi11b.bib.

D3) [Badia11a]
R. Badia, Y. Etsion, R. Gayatri, M. Pavlovic, T. Patejko, D. Goodman, C. Seaton, M. Lujan, I. Watson, A. Portero, R. Giorgi, A. Diavastos, C. Christofi, S. Arandi, G. Michael, T. Trancoso, P. Evripidou, S. Girbal, "Final report on the characterization and modeling", TERAFLUX D2.2, Siena, Italy, Dec 2011, pp. 1-43, (deliverable).
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BibTeX entry: Badia11a.bib.

D2) [Arandi11a]
S. Arandi, C. Kyriacou, G. Michael, G. Mathou, N. Masrujeh, T. Trancoso, P. Evripidou, R. Giorgi, Z. Yu, S. Collange, S. Scionti, B. Khan, S. Khan, M. Lujan, I. Watson, T. Ungerer, B. Fechner, A. Garbade, S. Weis, "Advanced TERAFLUX Architecture", TERAFLUX D6.2, Siena, Italy, Dec 2011, pp. 1-49, (deliverable).
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BibTeX entry: Arandi11a.bib.

D1) [Badia10a]
R. Badia, Y. Etsion, J. Labarta, N. Navarro, M. Pavlovic, C. Servat. H. and Villavieja, S. Girbal, M. Ansari, M. Lujan, C. Kirkham, I. Watson, R. Giorgi, A. Portero, A. Cohen, "Rep. on the reference set of applications chosen, and initial characterization of the applications", TERAFLUX D2.1, Siena, Italy, Dec 2010, pp. 1-44, (deliverable).
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BibTeX entry: Badia10a.bib.