Instruction-set extension (ISE) has been widely studied as a means to improve the performance of microprocessor devices running cryptographic applications. It consists,  essentially, in endowing an existing processor with a set of additional instructions that can be useful for speeding-up specific cryptographic computations. Recently,  researchers became aware of the following: The efficiency of an implementation algorithm often depends heavily on the details of the target platform, eg, on the instruction set or the pipeline of a processor. Hence, theoretical complexity measures, such as the bit complexity, can be misleading in practice. In this chapter, we will analyze the implications of designing and deploying an instruction-set extension for a microprocessor, we will give details on existing research proposals for various cryptographic applications, highlighting the associated benefits and limitations