The enhancement in silicon technology facilitates the integration of a higher number of cores on a single chip. Considering the current CMOS integration technology tendency; in the next future, systems are expected to scale up the number of cores, resulting in architectures composed by thousands of cores (i.e., namely kilo- core architecture). The architecture of these kilo-core systems is still an open issue (i.e., number and type of cores,  number of levels in the cache memory hierarchy, usage of specialized accelerators, inter-connections types, etc.). The simulators provides high benefit in finding out architectural designs trade-offs for such next generation systems. This paper proposes a simulation framework based on the COTSon infrastructure, able to create thousands of virtual x86-64 cores. The framework offers a full-system architectural simulator and a well balanced trade-off between simulation speed and accuracy. Experimental outcomes demonstrates for our framework the possibility correctly simulate a large many-core machine.